yh533388银河-银河正规网址

High-end MPU
Four Cortex A7+M33 High-speed Calculation and Data Treatment 4-Cortex MPU/DSP/ FPU 32KB I/D Cache; 512KB L2 Cache Embedded 128KB SRAM Support DDR3/DDR3L/LPDDR2/DDR2/MDDR, the maximum memory 8GB Support 2x eMMC, the maximum memory 1.2GHz Internal clock maximum memory 1.2GHz Embedded 128-bit DDR specified bus Configured specified bus access priority M33 internal cortex treating system - Semaphore/ IPC mechanism, to reach cortex communication - M33 SRAM 128KB, A7/ M33 shared SRAM 32KB
Features

Safety/ Reliability
  Internal cortex supports TrustZone security mechanism
  Embedded AES/HASH security algorithm
  Support TRNG
  Authorized security access
  Various of security enable mode
  Security information storage
  Independent Watch Dog Timer (WDT) clock
  Temperature sensor detection
  ECC debug

Application
Industrial equipment gateway, Concentrator, Industrial man-machine interface, Printer / Scanner, E-reader, etc.
Device family